sve2-intrinsics-perm-tb.ll
9.67 KB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve2 < %s | FileCheck %s
;
; TBL2
;
define <vscale x 16 x i8> @tbl2_b(<vscale x 16 x i8> %a, <vscale x 16 x i8> %unused,
<vscale x 16 x i8> %b, <vscale x 16 x i8> %c) {
; CHECK-LABEL: tbl2_b:
; CHECK: mov z1.d, z0.d
; CHECK-NEXT: tbl z0.b, { z1.b, z2.b }, z3.b
; CHECK-NEXT: ret
%out = call <vscale x 16 x i8> @llvm.aarch64.sve.tbl2.nxv16i8(<vscale x 16 x i8> %a,
<vscale x 16 x i8> %b,
<vscale x 16 x i8> %c)
ret <vscale x 16 x i8> %out
}
define <vscale x 8 x i16> @tbl2_h(<vscale x 8 x i16> %a, <vscale x 16 x i8> %unused,
<vscale x 8 x i16> %b, <vscale x 8 x i16> %c) {
; CHECK-LABEL: tbl2_h:
; CHECK: mov z1.d, z0.d
; CHECK-NEXT: tbl z0.h, { z1.h, z2.h }, z3.h
; CHECK-NEXT: ret
%out = call <vscale x 8 x i16> @llvm.aarch64.sve.tbl2.nxv8i16(<vscale x 8 x i16> %a,
<vscale x 8 x i16> %b,
<vscale x 8 x i16> %c)
ret <vscale x 8 x i16> %out
}
define <vscale x 4 x i32> @tbl2_s(<vscale x 4 x i32> %a, <vscale x 4 x i32> %unused,
<vscale x 4 x i32> %b, <vscale x 4 x i32> %c) {
; CHECK-LABEL: tbl2_s:
; CHECK: mov z1.d, z0.d
; CHECK-NEXT: tbl z0.s, { z1.s, z2.s }, z3.s
; CHECK-NEXT: ret
%out = call <vscale x 4 x i32> @llvm.aarch64.sve.tbl2.nxv4i32(<vscale x 4 x i32> %a,
<vscale x 4 x i32> %b,
<vscale x 4 x i32> %c)
ret <vscale x 4 x i32> %out
}
define <vscale x 2 x i64> @tbl2_d(<vscale x 2 x i64> %a, <vscale x 2 x i64> %unused,
<vscale x 2 x i64> %b, <vscale x 2 x i64> %c) {
; CHECK-LABEL: tbl2_d:
; CHECK: mov z1.d, z0.d
; CHECK-NEXT: tbl z0.d, { z1.d, z2.d }, z3.d
; CHECK-NEXT: ret
%out = call <vscale x 2 x i64> @llvm.aarch64.sve.tbl2.nxv2i64(<vscale x 2 x i64> %a,
<vscale x 2 x i64> %b,
<vscale x 2 x i64> %c)
ret <vscale x 2 x i64> %out
}
define <vscale x 8 x half> @tbl2_fh(<vscale x 8 x half> %a, <vscale x 8 x half> %unused,
<vscale x 8 x half> %b, <vscale x 8 x i16> %c) {
; CHECK-LABEL: tbl2_fh:
; CHECK: mov z1.d, z0.d
; CHECK-NEXT: tbl z0.h, { z1.h, z2.h }, z3.h
; CHECK-NEXT: ret
%out = call <vscale x 8 x half> @llvm.aarch64.sve.tbl2.nxv8f16(<vscale x 8 x half> %a,
<vscale x 8 x half> %b,
<vscale x 8 x i16> %c)
ret <vscale x 8 x half> %out
}
define <vscale x 4 x float> @tbl2_fs(<vscale x 4 x float> %a, <vscale x 4 x float> %unused,
<vscale x 4 x float> %b, <vscale x 4 x i32> %c) {
; CHECK-LABEL: tbl2_fs:
; CHECK: mov z1.d, z0.d
; CHECK-NEXT: tbl z0.s, { z1.s, z2.s }, z3.s
; CHECK-NEXT: ret
%out = call <vscale x 4 x float> @llvm.aarch64.sve.tbl2.nxv4f32(<vscale x 4 x float> %a,
<vscale x 4 x float> %b,
<vscale x 4 x i32> %c)
ret <vscale x 4 x float> %out
}
define <vscale x 2 x double> @tbl2_fd(<vscale x 2 x double> %a, <vscale x 2 x double> %unused,
<vscale x 2 x double> %b, <vscale x 2 x i64> %c) {
; CHECK-LABEL: tbl2_fd:
; CHECK: mov z1.d, z0.d
; CHECK-NEXT: tbl z0.d, { z1.d, z2.d }, z3.d
; CHECK-NEXT: ret
%out = call <vscale x 2 x double> @llvm.aarch64.sve.tbl2.nxv2f64(<vscale x 2 x double> %a,
<vscale x 2 x double> %b,
<vscale x 2 x i64> %c)
ret <vscale x 2 x double> %out
}
;
; TBX
;
define <vscale x 16 x i8> @tbx_b(<vscale x 16 x i8> %a, <vscale x 16 x i8> %b, <vscale x 16 x i8> %c) {
; CHECK-LABEL: tbx_b:
; CHECK: tbx z0.b, z1.b, z2.b
; CHECK-NEXT: ret
%out = call <vscale x 16 x i8> @llvm.aarch64.sve.tbx.nxv16i8(<vscale x 16 x i8> %a,
<vscale x 16 x i8> %b,
<vscale x 16 x i8> %c)
ret <vscale x 16 x i8> %out
}
define <vscale x 8 x i16> @tbx_h(<vscale x 8 x i16> %a, <vscale x 8 x i16> %b, <vscale x 8 x i16> %c) {
; CHECK-LABEL: tbx_h:
; CHECK: tbx z0.h, z1.h, z2.h
; CHECK-NEXT: ret
%out = call <vscale x 8 x i16> @llvm.aarch64.sve.tbx.nxv8i16(<vscale x 8 x i16> %a,
<vscale x 8 x i16> %b,
<vscale x 8 x i16> %c)
ret <vscale x 8 x i16> %out
}
define <vscale x 8 x half> @ftbx_h(<vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x i16> %c) {
; CHECK-LABEL: ftbx_h:
; CHECK: tbx z0.h, z1.h, z2.h
; CHECK-NEXT: ret
%out = call <vscale x 8 x half> @llvm.aarch64.sve.tbx.nxv8f16(<vscale x 8 x half> %a,
<vscale x 8 x half> %b,
<vscale x 8 x i16> %c)
ret <vscale x 8 x half> %out
}
define <vscale x 8 x bfloat> @ftbx_h_bf16(<vscale x 8 x bfloat> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x i16> %c) #0 {
; CHECK-LABEL: ftbx_h_bf16:
; CHECK: tbx z0.h, z1.h, z2.h
; CHECK-NEXT: ret
%out = call <vscale x 8 x bfloat> @llvm.aarch64.sve.tbx.nxv8bf16(<vscale x 8 x bfloat> %a,
<vscale x 8 x bfloat> %b,
<vscale x 8 x i16> %c)
ret <vscale x 8 x bfloat> %out
}
define <vscale x 4 x i32> @tbx_s(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b, <vscale x 4 x i32> %c) {
; CHECK-LABEL: tbx_s:
; CHECK: tbx z0.s, z1.s, z2.s
; CHECK-NEXT: ret
%out = call <vscale x 4 x i32> @llvm.aarch64.sve.tbx.nxv4i32(<vscale x 4 x i32> %a,
<vscale x 4 x i32> %b,
<vscale x 4 x i32> %c)
ret <vscale x 4 x i32> %out
}
define <vscale x 4 x float> @ftbx_s(<vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x i32> %c) {
; CHECK-LABEL: ftbx_s:
; CHECK: tbx z0.s, z1.s, z2.s
; CHECK-NEXT: ret
%out = call <vscale x 4 x float> @llvm.aarch64.sve.tbx.nxv4f32(<vscale x 4 x float> %a,
<vscale x 4 x float> %b,
<vscale x 4 x i32> %c)
ret <vscale x 4 x float> %out
}
define <vscale x 2 x i64> @tbx_d(<vscale x 2 x i64> %a, <vscale x 2 x i64> %b, <vscale x 2 x i64> %c) {
; CHECK-LABEL: tbx_d:
; CHECK: tbx z0.d, z1.d, z2.d
; CHECK-NEXT: ret
%out = call <vscale x 2 x i64> @llvm.aarch64.sve.tbx.nxv2i64(<vscale x 2 x i64> %a,
<vscale x 2 x i64> %b,
<vscale x 2 x i64> %c)
ret <vscale x 2 x i64> %out
}
define <vscale x 2 x double> @ftbx_d(<vscale x 2 x double> %a, <vscale x 2 x double> %b, <vscale x 2 x i64> %c) {
; CHECK-LABEL: ftbx_d:
; CHECK: tbx z0.d, z1.d, z2.d
; CHECK-NEXT: ret
%out = call <vscale x 2 x double> @llvm.aarch64.sve.tbx.nxv2f64(<vscale x 2 x double> %a,
<vscale x 2 x double> %b,
<vscale x 2 x i64> %c)
ret <vscale x 2 x double> %out
}
declare <vscale x 16 x i8> @llvm.aarch64.sve.tbl2.nxv16i8(<vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i8>)
declare <vscale x 8 x i16> @llvm.aarch64.sve.tbl2.nxv8i16(<vscale x 8 x i16>, <vscale x 8 x i16>, <vscale x 8 x i16>)
declare <vscale x 4 x i32> @llvm.aarch64.sve.tbl2.nxv4i32(<vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>)
declare <vscale x 2 x i64> @llvm.aarch64.sve.tbl2.nxv2i64(<vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64>)
declare <vscale x 8 x half> @llvm.aarch64.sve.tbl2.nxv8f16(<vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x i16>)
declare <vscale x 4 x float> @llvm.aarch64.sve.tbl2.nxv4f32(<vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x i32>)
declare <vscale x 2 x double> @llvm.aarch64.sve.tbl2.nxv2f64(<vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x i64>)
declare <vscale x 16 x i8> @llvm.aarch64.sve.tbx.nxv16i8(<vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i8>)
declare <vscale x 8 x i16> @llvm.aarch64.sve.tbx.nxv8i16(<vscale x 8 x i16>, <vscale x 8 x i16>, <vscale x 8 x i16>)
declare <vscale x 4 x i32> @llvm.aarch64.sve.tbx.nxv4i32(<vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>)
declare <vscale x 2 x i64> @llvm.aarch64.sve.tbx.nxv2i64(<vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64>)
declare <vscale x 8 x half> @llvm.aarch64.sve.tbx.nxv8f16(<vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x i16>)
declare <vscale x 4 x float> @llvm.aarch64.sve.tbx.nxv4f32(<vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x i32>)
declare <vscale x 2 x double> @llvm.aarch64.sve.tbx.nxv2f64(<vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x i64>)
declare <vscale x 8 x bfloat> @llvm.aarch64.sve.tbx.nxv8bf16(<vscale x 8 x bfloat>, <vscale x 8 x bfloat>, <vscale x 8 x i16>)
; +bf16 is required for the bfloat version.
attributes #0 = { "target-features"="+sve,+bf16" }