vec_sext.ll
2.5 KB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -instcombine -S | FileCheck %s
define <4 x i32> @vec_select(<4 x i32> %a, <4 x i32> %b) {
; CHECK-LABEL: @vec_select(
; CHECK-NEXT: [[SUB:%.*]] = sub nsw <4 x i32> zeroinitializer, [[A:%.*]]
; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt <4 x i32> [[B:%.*]], <i32 -1, i32 -1, i32 -1, i32 -1>
; CHECK-NEXT: [[TMP2:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> [[A]], <4 x i32> [[SUB]]
; CHECK-NEXT: ret <4 x i32> [[TMP2]]
;
%cmp = icmp slt <4 x i32> %b, zeroinitializer
%sext = sext <4 x i1> %cmp to <4 x i32>
%sub = sub nsw <4 x i32> zeroinitializer, %a
%t0 = icmp slt <4 x i32> %sext, zeroinitializer
%sext3 = sext <4 x i1> %t0 to <4 x i32>
%t1 = xor <4 x i32> %sext3, <i32 -1, i32 -1, i32 -1, i32 -1>
%t2 = and <4 x i32> %a, %t1
%t3 = and <4 x i32> %sext3, %sub
%cond = or <4 x i32> %t2, %t3
ret <4 x i32> %cond
}
define <4 x i32> @vec_select_alternate_sign_bit_test(<4 x i32> %a, <4 x i32> %b) {
; CHECK-LABEL: @vec_select_alternate_sign_bit_test(
; CHECK-NEXT: [[SUB:%.*]] = sub nsw <4 x i32> zeroinitializer, [[A:%.*]]
; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt <4 x i32> [[B:%.*]], <i32 -1, i32 -1, i32 -1, i32 -1>
; CHECK-NEXT: [[TMP2:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> [[SUB]], <4 x i32> [[A]]
; CHECK-NEXT: ret <4 x i32> [[TMP2]]
;
%cmp = icmp sgt <4 x i32> %b, <i32 -1, i32 -1, i32 -1, i32 -1>
%sext = sext <4 x i1> %cmp to <4 x i32>
%sub = sub nsw <4 x i32> zeroinitializer, %a
%t0 = icmp slt <4 x i32> %sext, zeroinitializer
%sext3 = sext <4 x i1> %t0 to <4 x i32>
%t1 = xor <4 x i32> %sext3, <i32 -1, i32 -1, i32 -1, i32 -1>
%t2 = and <4 x i32> %a, %t1
%t3 = and <4 x i32> %sext3, %sub
%cond = or <4 x i32> %t2, %t3
ret <4 x i32> %cond
}
define <2 x i32> @is_negative_undef_elt(<2 x i32> %a) {
; CHECK-LABEL: @is_negative_undef_elt(
; CHECK-NEXT: [[A_LOBIT:%.*]] = ashr <2 x i32> [[A:%.*]], <i32 31, i32 31>
; CHECK-NEXT: ret <2 x i32> [[A_LOBIT]]
;
%cmp = icmp slt <2 x i32> %a, <i32 0, i32 undef>
%sext = sext <2 x i1> %cmp to <2 x i32>
ret <2 x i32> %sext
}
define <2 x i32> @is_positive_undef_elt(<2 x i32> %a) {
; CHECK-LABEL: @is_positive_undef_elt(
; CHECK-NEXT: [[A_LOBIT:%.*]] = ashr <2 x i32> [[A:%.*]], <i32 31, i32 31>
; CHECK-NEXT: [[A_LOBIT_NOT:%.*]] = xor <2 x i32> [[A_LOBIT]], <i32 -1, i32 -1>
; CHECK-NEXT: ret <2 x i32> [[A_LOBIT_NOT]]
;
%cmp = icmp sgt <2 x i32> %a, <i32 undef, i32 -1>
%sext = sext <2 x i1> %cmp to <2 x i32>
ret <2 x i32> %sext
}